Introduction to Computer Architecture

RISC-V ISA

CPU Architecture 101

An introductory course that teaches the fundamental concepts of modern processors

Description

CPU Architecture 101 teaches the key concepts of CPU design, instruction execution, and data processing. They will gain a solid grasp of the components that make up a CPU, including registers, arithmetic logic units (ALUs), control units, and cache memory. Students will also learn about different CPU architectures, such as von Neumann and Harvard architectures, and how they impact system performance.

Through the practical activities in the boot camp, students will learn how instructions are fetched from memory, decoded, and executed by the CPU. They will explore pipelining, parallelism, and the role of modern microprocessors in achieving faster and more efficient computations.

In addition to the theoretical aspects, this course will delve into real-world examples and case studies, showcasing the evolution of CPU architectures and their applications in various industries, from personal computing and embedded systems.

Learning outcomes

  • Understand the key components of a computer system and how they interact at a high level.
  • Understand the fetch-decode-execute cycle and how instructions are processed
  • Describe CPU design elements like pipelines, registers, ALUs, control units, etc.
  • Analyze the memory hierarchy including caches, RAM, and storage
  • Compare different instruction set architectures (RISC vs CISC)
  • Discuss how pipelining improves performance by overlapping steps
  • Explain basic hazards like structural, data, and control and approaches to handle them
  • Analyze performance of code blocks in terms of runtime, throughput, CPI, etc.
  • Understand how caching exploits temporal and spatial locality
  • Apply tools like profilers and simulators to evaluate system performance
  • Design basic datapaths and control units for a simple processor
  • Discuss modern CPU optimization techniques like branch prediction, out-of-order execution, etc.

Target audience

  • College undergraduate students

Duration

8 weeks